The present invention concerns a powerful semi-conducting device made of material of the 3-5 group such as GaAs on a silicon substrate and a manufacturing process for such a device.
To make transistors operating at millimetric frequencies, it is a known technique to use materials of the 3-5 group such as gallium arsenide, GaAs. However, although gallium arsenide and similar materials have good electrical performance, they are poor heat conductors, which restricts their use in powerful transistors.
To remedy these disadvantages, it has been envisaged to make transistors on a layer of 3-5 material, more particularly GaAs, which is grown on a silicon substrate. Silicon has the advantage of being a better heat conductor than gallium arsenide and can therefore act as a radiator dissipating heat.
To make use of this heat conduction property of silicon, it was proposed in French patent application no. 88 13155 filed by the Thomson Hybride and Microondes Company, to connect one of the channel access regions called source or drain to the silicon substrate via a metal core. This solution is particularly advantageous for powerful transistors. To obtain a powerful transistor, a sufficient gate width is required. However, the gate width is limited by the dephasing due to the RC circuit formed by the gate resistance and the parasite gate-drain and gate-source capacitances. This dephasing increases at high frequencies. To remedy this disadvantage, an interdigital structure was therefore proposed. This interdigital structure requires the sources and/or drains to be connected to each other. Thus, by using the metallic cores described in French patent no. 88 13144, it is possible to connect sources or drains using the silicon substrate which can be suitably doped to make it a conductor. In this case, the silicon substrate serves both as a radiator and as an electrical connection.
This solution, which is well-mastered from a technological point of view, has the disadvantage that is introduces parasite gate-source or drain-source capacitances which restrict the operation of the transistors to frequencies of less than 10 GHz.
These parasite capacitances are due to the thinness of the semi-insulating layer of gallium arsenide grown by epitaxy on the silicon substrate. To reduce these capacitances, a much thicker semi-insulating buffer layer would be necessary. However, recent progress in gallium arsenide epitaxy enables layers of gallium arsenide with good crystallographic qualities to be obtained for thicknesses of at most 6 .mu.m on a silicon substrate. At greater thicknesses, the gallium arsenide has many defects and it is then impossible to create good circuits. Moreover, the use of a much thicker semi-insulating layer of gallium arsenide is not a good idea from a thermal point of view, since gallium arsenide is a poorer heat conductor than silicon. Thus, the thicker the semi-insulating gallium arsenide layer, the higher the thermal resistance of the transistor.
Consequently, the aim of the present invention is to provide a new powerful transistor of 3-5 material on silicon, enabling these disadvantages to be remedied.